The presentation discusses the shift towards custom hardware for specific computational activities and the emergence of open source instruction set architecture (ISA) such as RISC-V as a response to the limitations of proprietary ISAs.
Hardware is becoming more heterogeneous and specialized to maintain performance improvements
Custom hardware for specific computational activities is being developed, known as domain-specific accelerators
Open source ISAs such as RISC-V provide an open interface for implementing hardware, allowing for a landscape of modular implementations catering to specific use cases
The shift towards open source ISAs is necessary to continue satisfying complex computing demands and avoid diminishing value and innovation
The presentation includes a demo of running Kubernetes in a RISC-V PC and deploying a simple application
The presenter demonstrates running Kubernetes in a RISC-V PC and deploying a simple application, highlighting the progress made in an architecture that received Linux mainline support less than three years ago.
Abstract
The cloud-native ecosystem has evolved over the past decade to include countless open source projects and solutions, allowing organizations to piece together software platforms that are highly tailored to their specific requirements. However, as Moore’s Law and Dennard Scaling have plateaued, performance gains and energy efficiency must be found in custom hardware in the form of domain specific accelerators. For software to target these heterogeneous architectures, a standard ISA with a common core is required. In this session we will explore how RISC-V will open up the lowest layer of the cloud-native landscape, enabling system builders to innovate across the whole stack, while still leveraging common technology, such as Kubernetes.
Authors: Bob Killen, Thomas Di Giacomo, Ralph Squillace, Vijoy Pandey, Aeva Black, Daniel Mangum, Constance Caramanolis, Stephen Augustus, Carlos Eduardo de Paula, Gar Mac Críosta, Liam Randall